linux - Cache coherence and its solution -


i reading cache coherence (http://simple.wikipedia.org/wiki/cache_coherence, what's point of cache coherency?). stated that

cache coherence problems appears processor having multiple cache memory.

my question is: have multiple cache in single processor. kernel allocate 1 cache line per page table of progress. why cache coherence problem come , solution?

you may have multiple threads , or interrupt handlers inside process. cpu may hold values of single memory address separate caches. external modules , drivers may share memory resource own cached values. in context, cache coherency problem arise.


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